Hybrid bonding enters HBM by end-2027
AI chips need very fast memory, built as a tower of thin chips joined with tiny solder bumps. The question: will at least one memory maker switch to hybrid bonding, which fuses the chips directly, in volume production before the end of 2027?
New to this? Explained easy, in 3 pictures ↓What changed lately
- ●24 Oct 2026Samsung Q3 full results confirmed for 29 Oct 2026
- ▲23 Oct 2026New milestone: Besi Q4 2026 results, 25 Feb 2027
- ▲23 Oct 2026New milestone: Besi Q1 2027 results, 22 Apr 2027
Next:28 Oct 2026 · SK Hynix Q3 resultsin 4 days
Explained easy
The whole thesis in three pictures
Explained easy · 1 / 3
What HBM is
An AI chip sits in the middle, surrounded by towers of memory called HBM. Each tower is up to 16 thin memory chips stacked like floors. The taller the tower, the more memory the AI chip can use.
Both sides
The two sides of the story
▲ How the For case plays out
- 1
AI chips want more memory, so HBM towers grow from 12 to 16 floors and beyond
- 2
Every floor must fit under the JEDEC height cap, 775 µm today
- 3
Fusing the floors saves height and cuts heat resistance by over 20%
- 4
Memory makers are already testing it: one is evaluating Besi tools, SK Hynix runs a pilot line
- 5
So one maker, most likely Samsung, ships fused 16-high HBM4E in volume by end-2027
▼ How the Against case plays out
- 1
JEDEC is weighing a taller cap, about 900 µm, from HBM4E
- 2
With more room, solder-bump bonders can still stack 16 floors
- 3
12-high stays the mainstream HBM4E product; demand for 16-high is limited
- 4
SK Hynix keeps solder bumps through HBM4E and moves hybrid bonding to HBM5
- 5
HBM5 comes after 2027, so volume hybrid bonding in memory misses the deadline
Prices and events
The companies, and what moved them
▲ / ▼ / ● = past events on the chart · % change from start of range
Who depends on whom
How the companies are connected
- ▲ For
- ▼ Against
- ● Both / neutral (outlined)
- Bigger circle = more relevant
- Thicker line = matters more for the thesis
- Dashed = indirect / to verify
Calendar
Every milestone, in order
Q4 2026 – Q4 2027
WindowWindow openThesisFirst volume orders from a memory maker
Production orders of hybrid bonders for HBM, not pilot tools.
▲ If it happens: For · strong
22 Oct 2026
ConfirmedHappened ✓BesiBesi Q3 results
Did the memory evaluation pass, and did it turn into an order?
▼ Against · mildNo HBM hybrid-bonding order disclosed; growth came from logic and optics
▲ If memory orders: For · moderate
28 Oct 2026
ConfirmedIn 4 daysSK HynixSK Hynix Q3 results
Any change to its HBM4E and HBM5 bonding plans or its pilot line.
● Could move either way · moderate
29 Oct 2026
ConfirmedIn 5 daysSamsung ElectronicsSamsung Q3 full results
Comments on hybrid bonding in 16-high HBM4E. Preliminary figures came out on 8 Oct.
● Could move either way · moderate
~23 Dec 2026
TBCIn 60 daysMicronMicron fiscal Q1 results
Bonding plans for its next HBM generations.
● Could move either way · mild
2027
WindowIn 69 daysThesis16-high HBM4E qualified on solder bumps
16-high passes customer qualification with TC bonding and no hybrid-bonded variant.
▼ If it happens: Against · moderate
2027
WindowIn 69 daysSamsung ElectronicsSamsung uses hybrid bonding in shipping HBM4E
Even a partial switch in a product sold to customers.
▲ If it happens: For · strong
Before Dec 2027
WindowIn 69 daysThesisAll three makers commit to solder bumps through 2027
Would close the thesis as Against early.
▼ Would end it: Against
Date TBD
TBDIn 83 daysThesisJEDEC decides the HBM4E height limit
A cap kept at 775 µm favours hybrid bonding; about 900 µm lets solder bumps live on.
● Decisive either way
25 Feb 2027
ConfirmedNewIn 124 daysBesiBesi Q4 2026 results
Any hybrid-bonding orders or evaluations from a memory (HBM) maker.
▲ If memory orders: For · moderate
22 Apr 2027
ConfirmedNewIn 180 daysBesiBesi Q1 2027 results
Any hybrid-bonding orders or evaluations from a memory (HBM) maker.
▲ If memory orders: For · moderate
31 Dec 2027
FixedIn 433 daysThesisResolution date
No volume hybrid-bonded HBM confirmed by this date means Against.
● Final check
Dates marked "TBC" or "Window" come from company guidance or industry reports and may move. We update them as soon as they are confirmed.
Sources
News and our updates, with sources
22 Oct 2026
NewsThesis · BesiBesi Q3: orders surge on logic, memory still delayed
Besi's 9M 2026 hybrid-bonding orders topped twice all of 2025, but growth came from logic chiplets, co-packaged optics and edge AI. The article says memory makers delayed HBM hybrid bonding; the CEO says memory interest is rising. No memory orders were disclosed.
bits-chips.com ↗ · New since the paper
● Mixed · mild: memory delay acknowledged, interest rising
Aug 2026
NewsThesis · SK HynixSK Hynix keeps solder bumps through HBM4E
At Hot Chips its VP said hybrid bonding moves to HBM5, mainly because of the height standard. The largest maker steps back from 2027.
Bits&Chips ↗ · In the paper
▼ Pushed Against · strong
23 Jul 2026
NewsThesis · BesiBesi Q2: one memory maker evaluating
Hybrid-bonding customers rise to 21, mostly outside memory. One of the three memory makers is evaluating Besi tools; the CEO expects clarity in the second half.
Besi Q2-26 results and call ↗ · In the paper
▲ Pushed For · mild
7 Jul 2026
NewsThesisMakers rethink the hybrid-bonding timeline
Reports say Samsung and SK Hynix now see 16-high HBM4E as the earliest use, with 12-high still mainstream.
TrendForce ↗ · In the paper
▼ Pushed Against · moderate
Jun 2026
NewsThesis · Hanmi SemiconductorSK Hynix orders solder-bump bonders from Hanmi
A 44.2 billion won order for HBM4 production: the current generation stays on bumps.
TrendForce ↗ · In the paper
▼ Pushed Against · mild
Apr 2026
NewsThesisJEDEC weighs a 900 µm cap for HBM4E
A taller limit would let solder bumps reach 16 floors and could delay hybrid bonding. Not decided.
TrendForce ↗ · In the paper
▼ Pushed Against · moderate
Mar 2026
NewsThesis · Samsung ElectronicsSamsung backs hybrid bonding at GTC
Samsung showed HBM4E and said hybrid copper bonding cuts heat resistance by over 20% and enables 16 or more layers.
Samsung via Business Wire ↗ · In the paper
▲ Pushed For · mild
Mar 2026
NewsThesisTalks on a taller HBM height limit
The industry discusses 825–900 µm for future 20-high stacks, which would let solder bumps live on.
TrendForce ↗ · In the paper
▼ Pushed Against · mild
History
Thesis log
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Coming next
Values and portfolios
Soon you'll see what each side of the thesis could mean for company values, and how it fits into a portfolio.